Josephson junctions form the basis of much of superconductive electronics, both analog and digital, and thus using high-temperature superconductors to fabricate such junctions has been of considerable interest. A variety of Josephson junction technologies have been explored for high-temperature superconduction junctions, including grain-boundary junction (Koch, 1987; Nakane; Zimmerman; Hauser; Koch, 1989; Face; Char), step edge junctions (Laibowitz; Gao, 1990, 1991, Chin; Hunt), and metal bridge (SNS) junctions (Mankiewich; Schwarz; Moreland; Forrester; Dilorio; Ono; Gijs; Wire). In addition, attempts have been made to fabricate trilayer structures and pattern them into Josephson junctions. Thus, Rogers et al. (Rogers) reported a supercurrent in YBa.sub.2 Cu.sub.3 O.sub.7 /PrBa.sub.2 Cu.sub.3 O.sub.7 /YBa.sub.2 Cu.sub.3 O.sub.7 trilayers deposited by laser ablation. Mizuno et al. (Mizuno, 1990a) employed Bi.sub.2 Sr.sub.2 CaCu.sub.2 O/Bi.sub.2 Sr.sub.2 CuO.sub.6 /Bi.sub.2 Sr.sub.2 CaCu.sub.2 O.sub.8 trilayers deposited by sputtering, while Mizuno and Setsune (Mizuno, 1990b) utilized Bi.sub.2 Sr.sub.2Nd Cu.sub.2 O.sub.8 as the barrier material.
Ideally, for use as logic elements in electronic circuits, a Josephson junction should show a pronounced I-V hysteresis characteristics. Heretofore, date, efforts to produce a Josephson junction employing high-T.sub.c thin films and having pronounced I-V hysteresis characteristics have not been reported.